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DRS Package
(Top View)
1
2
3
4
5
6
IN-
GND
OUT
IN+
GND
VDD
GND
VDD IN+
OUTH
OUTL
1
2
3
6
4
IN-5
GND
VDD IN+
OUTH
OUTL
1
2
3
6
4
IN-5
UCC27511
,
UCC27512
www.ti.com
SLUSAW9F FEBRUARY 2012REVISED NOVEMBER 2014
Table 2. UCC2751x Features and Benefits (continued)
FEATURE BENEFIT
Ability of input pins (and enable pin in UCC27518/9) to handle System simplification, especially related to auxiliary bias supply
voltage levels not restricted by VDD pin bias voltage architecture
Split output structure in UCC27511 (OUTH, OUTL) Allows independent optimization of turnon and turnoff speeds
Strong sink current (8 A) and low pulldown impedance (0.375 Ω) in
High immunity to C x dV/dt Miller turnon events
UCC27511 and UCC27512
Enhanced noise immunity, while retaining compatibility with
CMOS/TTL compatible input-threshold logic with wide hysteresis in
microcontroller logic-level input signals (3.3 V, 5 V) optimized for
UCC27511, UCC27512, UCC27516 and UCC27517
digital power
CMOS input threshold logic in UCC27518/9 (VIN_H 70% VDD, Well suited for slow input-voltage signals, with flexibility to program
VIN_L 30% VDD) delay circuits (RCD)
7 Pin Configuration and Functions
6-Pins
DBV Package
(Top View)
6-Pins
Copyright © 2012–2014, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Links: UCC27511 UCC27512

UCC27511DBVR 数据手册

TI(德州仪器)
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UCC27511 数据手册

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