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CY7C1049B15VXC
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CY7C1049B15VXC数据手册
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CY7C1049B
Document #: 38-05169 Rev. *B Page 5 of 9
Data Retention Waveform
Switching Waveforms
Read Cycle No. 1
[12, 13]
Read Cycle No. 2 (OE Controlled)
[13, 14]
Notes:
12.Device is continuously selected. OE
, CE = V
IL
.
13.WE
is HIGH for read cycle.
14.Address valid prior to or coincident with CE
transition LOW.
3.0V3.0V
t
CDR
V
DR
> 2V
DATA RETENTION MODE
t
R
CE
V
CC
PREVIOUS DATA VALID DATA VALID
t
RC
t
AA
t
OHA
ADDRESS
DATA OUT
50%
50%
DATA VALID
t
RC
t
ACE
t
DOE
t
LZOE
t
LZCE
t
PU
HIGH IMPEDANCE
t
HZOE
t
HZCE
t
PD
HIGH
OE
CE
I
CC
I
SB
IMPEDANCE
ADDRESS
DATA OUT
V
CC
SUPPLY
CURRENT

CY7C1049B15VXC 数据手册

Cypress Semiconductor(赛普拉斯)
9 页 / 0.27 MByte

CY7C1049B15 数据手册

Cypress Semiconductor(赛普拉斯)
512K ×8静态RAM 512K x 8 Static RAM
Cypress Semiconductor(赛普拉斯)
512K ×8静态RAM 512K x 8 Static RAM
Cypress Semiconductor(赛普拉斯)
512K ×8静态RAM 512K x 8 Static RAM
Cypress Semiconductor(赛普拉斯)
Cypress Semiconductor(赛普拉斯)
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