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M2S090-1FG484I 其他数据使用手册 - SOC（赛元微）
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SOC（赛元微）
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BGA-484
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M2S090-1FG484I数据手册
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Microsemi Corporation
One Enterprise, Aliso Viejo, CA 92656 USA
Within the USA: +1 (800) 713-4113 Outside the USA: +1 (949) 380-6100 Sales: +1 (949) 380-6136 Fax: +1 (949) 215-4996 E-mail: sales.support@microsemi.com
www.microsemi.com 2
Symbol
Description
Maximum Clock
Frequency (MHz)
Minimum
Typical
(ns)
Maximum
(ns)
sp9m
SPI_[0 | 1]_DI hold time
20
- 2.5
–
–
SPI Slave Configuration (Applicable to 060, 090, and 150 Devices)
sp6s
SPI_[0 | 1]_DO setup time
20
(SPI_x_CLK_period/2) - 16.0
–
–
sp7s
SPI_[0 | 1]_DO hold time
20
(SPI_x_CLK_period/2) - 3.5
–
–
sp8s
SPI_[0 | 1]_DI setup time
20
3
–
–
sp9s
SPI_[0 | 1]_DI hold time
20
2.5
–
–
Application Impact
The maximum clock frequency setup in the designs needs to be verified. If a 25 MHz SPI clock is currently
used, the clock frequency must be lowered to 20 MHz.
Affected Devices
See Appendix: Affected SmartFusion2 and IGLOO2 Devices.
Contact Information
For further clarifications or questions, contact Microsemi’s Technical Support at: soc_tech@microsemi.com
Regards,
Microsemi Corporation
Any projected dates in this PCN are based on the most current product information at the time this PCN is
being issued, but they may change due to unforeseen circumstances. For the latest schedule and any other
information, please contact your local Microsemi Sales Office, the factory contact shown above, or your local
distributor.
This Product/Process Change Notification is confidential and proprietary information of Microsemi and is
intended only for distribution by Microsemi to its customers, for customers’ use only. It must not be copied or
provided to any third party without Microsemi's prior written consent.
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