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AD5331BRU-REEL7 数据手册 - ADI(亚德诺)
制造商:
ADI(亚德诺)
分类:
DA转换器
封装:
TSSOP
描述:
2.5 V至5.5 V , 115 μA ,并行接口单电压输出8位/ 10位/ 12位DAC 2.5 V to 5.5 V, 115 μA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs
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3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P7P8P9P10P23Hot
典型应用电路图在P21
原理图在P1P7P8P9P10
封装尺寸在P24
型号编码规则在P25
焊接温度在P6
功能描述在P1P7P8P9P10
技术参数、封装参数在P1P3P6
应用领域在P1P21
电气规格在P13
导航目录
AD5331BRU-REEL7数据手册
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AD5330/AD5331/AD5340/AD5341
Rev. A | Page 4 of 28
Parameter
1
B Version
2
Unit Conditions/Comments Min Typ Max
POWER REQUIREMENTS
V
DD
2.5 5.5 V
I
DD
(Normal Mode) DACs active and excluding load currents. Unbuffered
V
DD
= 4.5 V to 5.5 V 140 250 μA Reference, V
IH
= V
DD
, V
IL
= GND
V
DD
= 2.5 V to 3.6 V 115 200 μA I
DD
increases by 50 μA at V
REF
> V
DD
− 100 mV.
In buffered mode, extra current is (5 + V
REF
/R
DAC
) μA,
where R
DAC
is the resistance of the resistor string.
I
DD
(Power-Down Mode)
V
DD
= 4.5 V to 5.5 V 0.2 1 μA
V
DD
= 2.5 V to 3.6 V 0.08 1 μA
1
See the Terminology section.
2
Temperature range: B Version: −40°C to +105°C; typical specifications are at 25°C.
3
Linearity is tested using a reduced code range: AD5330 (Code 8 to Code 255); AD5331 (Code 28 to Code 1023); AD5340/AD5341 (Code 115 to Code 4095).
4
DC specifications tested with output unloaded.
5
This corresponds to x codes. x = deadband voltage/LSB size.
6
Guaranteed by design and characterization, not production tested.
7
For the amplifier output to reach its minimum voltage, offset error must be negative. For the amplifier output to reach its maximum voltage, V
REF
= V
DD
and offset plus
gain error must be positive.
AC CHARACTERISTICS
1
V
DD
= 2.5 V to 5.5 V. R
L
= 2 kΩ to GND, C
L
= 200 pF to GND; all specifications T
MIN
to T
MAX
, unless otherwise noted.
Table 2.
Parameter
2
B Version
3
Unit Conditions/Comments Min Typ Max
Output Voltage Settling Time V
REF
= 2 V; see Figure 29
AD5330 6 8 μs ¼ scale to ¾ scale change (0x40 to 0xC0)
AD5331 7 9 μs ¼ scale to ¾ scale change (0x100 to 0x300)
AD5340 8 10 μs ¼ scale to ¾ scale change (0x400 to 0xC00)
AD5341 8 10 μs ¼ scale to ¾ scale change (0x400 to 0xC00)
Slew Rate 0.7 V/μs
Major Code Transition Glitch Energy 6 nV/s 1 LSB change around major carry
Digital Feedthrough 0.5 nV/s
Multiplying Bandwidth 200 kHz V
REF
= 2 V ± 0.1 V p-p; unbuffered mode
Total Harmonic Distortion −70 dB V
REF
= 2.5 V ± 0.1 V p-p; frequency = 10 kHz
1
Guaranteed by design and characterization, not production tested.
2
See the Terminology section.
3
Temperature range: B Version: −40°C to +105°C; typical specifications are at 25°C.
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